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ATmega128
Two-wire Serial
Interface
Features
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Simple yet Powerful and Flexible Communication Interface, only Two Bus Lines Needed
Both Master and Slave Operation Supported
Device can Operate as Transmitter or Receiver
7-bit Address Space allows up to 128 Different Slave Addresses
Multi-master Arbitration Support
Up to 400kHz Data Transfer Speed
Slew-rate Limited Output Drivers
Noise Suppression Circuitry Rejects Spikes on Bus Lines
Fully Programmable Slave Address with General Call Support
Address Recognition Causes Wake-up when AVR is in Sleep Mode
Two-wire Serial
Interface Bus
Definition
The Two-wire Serial Interface (T W I) is ideally suited for typical microcontroller applications. The
T W I protocol allows the systems designer to interconnect up to 128 different devices using only
two bi-directional bus lines, one for clock (SCL) and one for data (SDA). The only external hard-
ware needed to implement the bus is a single pull-up resistor for each of the T W I bus lines. All
devices connected to the bus have individual addresses, and mechanisms for resolving bus
contention are inherent in the T W I protocol.
Figure 86. T W I Bus Interconnection
V CC
Device 1
Device 2
Device 3
........
Device n
R1
R2
SDA
SCL
TWI Terminology
The following definitions are frequently encountered in this section.
Table 86. T W I Terminology
Term
Master
Slave
Transmitter
Receiver
Description
The device that initiates and terminates a transmission. The master also
generates the SCL clock
The device addressed by a master
The device placing data on the bus
The device reading data from the bus
Electrical
Interconnection
As depicted in Figure 86 , both bus lines are connected to the positive supply voltage through
pull-up resistors. The bus drivers of all T W I-compliant devices are open-drain or open-collector.
This implements a wired-AND function which is essential to the operation of the interface. A low
level on a T W I bus line is generated when one or more T W I devices output a zero. A high level
is output when all T W I devices tri-state their outputs, allowing the pull-up resistors to pull the line
197
2467X–AVR–06/11
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